1. Field of the Invention
The present invention relates to a semiconductor device unit that enables easy transportation, test, or packaging and shipment of a semiconductor device, a packaging structure of the semiconductor device, a semiconductor device protection method, and a protection cover of the semiconductor device.
2. Description of the Related Art
In the recent years and continuing, because portable devices, such as PDAs (personal digital assistant), mobile phones, and digital cameras are becoming light and small, it is also required that semiconductor devices used in these portable devices be light and small.
In response to this requirement, the so-called “chip size package” (CSP) is rapidly spreading, which further reduces package size close to the size of the packaged semiconductor element (chip).
Typical examples of CSP include FBGA (Fine-pitch Ball Array), FLGA (Fine-pitch Land Grid Array).
In a CSP, a technique known as Package Stacked MCP (Multi Chip Package) may be used to include more semiconductor chips.
In semiconductors which form a CPU (Central Processing Unit), since operating temperature largely increases due to increase of power consumption related to high-speed operation, a heat spreader made of a metal having high heat conductance is attached to the top of the semiconductor device for cooling.
As mentioned above, in order to achieve for small size and light weight of an electronic device in which such a semiconductor device is installed, the semiconductor device is required to be light and thin-shaped, and thus frequently a cover or a lid is not provided on an interposer in the semiconductor device.
In a semiconductor device generating a large amount of heat and having high power consumption, the temperature of the built-in semiconductor chip tend to increase, hence after mounting of the semiconductor chip, it is necessary to directly cool the top surface of the chip. For example, Japanese Laid-Open Patent Application No. 8-99299 (page 4, 5, and FIG. 2) discloses a technique of directly cooling a semiconductor chip, in which a heat sink made of a metal having high heat conductance is attached for cooling.
There is a more efficient cooling technique involving directly cooling the surface of a semiconductor chip with a liquid cooling device. When this technique is used, because it is necessary to directly expose the surface of the semiconductor chip, a metal lid or a heat spreader is not attached to the top surface of the semiconductor chip, hence the chip, a liquid sealing resin, and electronic parts like capacitors are exposed to the outside.
In the Package Stacked MCP (Multi Chip Package) used for stacked mounting, that is, further stacking a second semiconductor device on a first semiconductor device, the chip and the liquid sealing resin of the first semiconductor device, which is on the lower side, are exposed, and on the top side of the first semiconductor device, there are projecting solder balls to be joined to the second semiconductor device on the upper side.
In a flip chip mounting in which a semiconductor device is mounted to face downward, in order to decrease height of the mounting of the semiconductor device, usually sealing with resin is not conducted. Also in this case, on the top of the semiconductor device, the chip is exposed.
For a semiconductor device whose semiconductor chip and electric parts are exposed on the top thereof, contact damage to the chip and the parts should be considered during performance tests, transportation, and packaging for shipment. Especially, in the performance tests, when pressing a semiconductor device on a contactor or into a socket, only the chip itself is directly pressed, and this may cause cracks or defects in the chip.
Further, when pressing a number of semiconductor chips at the same time, the load applied on the semiconductor chips may be non-uniform because of unevenness of the surface of the semiconductor device caused by height differences and deviation of mounting positions of the semiconductor chips. This is the so-called unbalanced load problem.
When unbalanced load occurs in performance tests, external connection terminals of the semiconductor device are not in good connection condition with terminals of the testing device, and this greatly lowers reliability of the test.
When unbalanced load occurs in packaging and shipment, semiconductor devices may be damaged during transportation due to application of external forces.
When a semiconductor chip is sealed by means of bonding, which uses a liquid sealing resin, but not by means of resin sealing using resin molding, because the top surface of the semiconductor device is uneven and has a low flatness, it is very difficult to press the top surface of the semiconductor device uniformly in performance tests. Thus, unbalanced load occurs also in this case, greatly lowering reliability of the performance tests and in transportation after shipment.